update: fwdb from v350+i20260512+1cce to v351+i20260512+1cce, 9 microcode changes

built from commit 2bd3957480
 dated 2026-06-15 11:36:12 +0000
 by speed47 (218502+speed47@users.noreply.github.com)

doc/UNSUPPORTED_CVE_LIST.md

@@ -188,18 +188,6 @@ Observable timing discrepancy in some Intel processors allows an authenticated u
 
 **Why out of scope:** Like CVE-2020-24511, this is a microcode-only fix with no Linux kernel sysfs entry, no CPUID bit, no MSR, and no kernel configuration option. Detection would require a per-CPU-stepping microcode version lookup table. The vulnerability has low severity (CVSS 2.8) and practical exploitation is limited. Intel dropped microcode support for Sandy Bridge and Ivy Bridge, leaving those generations permanently vulnerable.
 
-## CVE-2021-26314 / CVE-2021-26313 — Floating-Point Value Injection (FPVI) and Speculative Code Store Bypass (SCSB)
-
-- **Bulletin:** [AMD-SB-1003](https://www.amd.com/en/resources/product-security/bulletin/amd-sb-1003.html) (FPVI and SCSB); [AMD-SB-7050](https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7050.html) (FPVI variant, informational)
-- **Intel advisory:** [Floating Point Value Injection](https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/floating-point-value-injection.html)
-- **Research paper:** [Rage Against the Machine Clear (FPVI/SCSB) — VUSec, USENIX Security '21](https://www.vusec.net/projects/fpvi-scsb/)
-- **Affected CPUs:** All supported AMD CPU products; Intel CPUs (FPVI)
-- **CVSS:** 5.5 (Medium) for both
-
-FPVI (CVE-2021-26314) lets an attacker inject arbitrary floating-point values into the transient execution window opened by a floating-point machine clear, so that dependent operations transiently compute on attacker-influenced values that can then be inferred through a microarchitectural covert channel. SCSB (CVE-2021-26313) is the companion vulnerability where overwritten instructions may still be executed speculatively. AMD-SB-7050 documents an FPVI variant (from the "TREVEX" detection-framework paper) that can be triggered without denormal inputs; AMD considers it to fall within the existing scope of CVE-2021-26314 and assigned it no new CVE, classifying it as informational only.
-
-**Why out of scope:** The mitigation responsibility falls on individual software, not on the kernel or microcode. Both AMD and Intel recommend that software vendors analyze their code for vulnerable speculative floating-point sequences and insert an `LFENCE` to serialize execution. No microcode update, no CPUID flag, no MSR, and no kernel configuration option was issued, and there is no `/sys/devices/system/cpu/vulnerabilities/` entry for FPVI or SCSB — the kernel never added one, because the fix is not a kernel-level control. This is the same situation as [SLAM (CVE-2020-12965)](#cve-2020-12965--transient-execution-of-non-canonical-accesses-slam) and "Take A Way": the vendor's guidance is "software inserts LFENCE in its own code," leaving nothing for this tool to check. The AMD-SB-7050 variant adds nothing detectable, as it is informational and reuses the existing (software-only) FPVI guidance.
-
 ## CVE-2021-26318 — AMD Prefetch Attacks through Power and Time
 
 - **Issue:** [#412](https://github.com/speed47/spectre-meltdown-checker/issues/412)
@@ -320,28 +308,6 @@ Exploits a synchronization failure in the AMD stack engine via an undocumented M
 
 **Why out of scope:** Not a transient/speculative execution side channel. This is an architectural attack on AMD SEV-SNP confidential computing that requires hypervisor access, which is outside the threat model of this tool.
 
-## CVE-2025-52533 — AMD On-Chip Debug Interface Improper Access Control
-
-- **Advisory:** [NVD CVE-2025-52533](https://nvd.nist.gov/vuln/detail/CVE-2025-52533)
-- **Affected CPUs:** AMD (various; on-chip debug/test interface)
-- **CVSS:** 8.7 (High)
-- **CWE:** [CWE-1191 (On-Chip Debug and Test Interface With Improper Access Control)](https://cwe.mitre.org/data/definitions/1191.html)
-
-Improper access control in an on-chip debug interface could allow a privileged attacker to enable a debug interface and potentially compromise data confidentiality or integrity.
-
-**Why out of scope:** Not a transient or speculative execution vulnerability — this is an access-control flaw in a hardware debug/test interface (CWE-1191), with no side-channel or speculative execution component, and it requires a privileged attacker. There is no Linux kernel sysfs entry, no CPUID flag, and no kernel-side mitigation: the fix is delivered as platform/PSP firmware and proven via remote attestation against AMD's Key Distribution Service (KDS), with several SKUs marked "no fix planned." None of this is detectable by this tool, which inspects OS-loadable microcode revisions, CPUID/MSR bits, kernel capabilities, and sysfs.
-
-## CVE-2026-46174 — AMD Zen 2 Op Cache Improper Resource Isolation
-
-- **Bulletin:** [AMD-SB-7052](https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7052.html) (CPU OP Cache Corruption)
-- **Kernel fix:** [commit 1e23b30a80b1](https://github.com/torvalds/linux/commit/1e23b30a80b14e5764657401ee2cca030525ae8e) — `x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache`
-- **Affected CPUs:** AMD Zen 2
-- **CVSS:** 8.8 (High)
-
-Resources in the Zen 2 micro-op (op) cache can be improperly shared, causing instruction corruption that may be leveraged to execute instructions at a higher privilege level (userspace-to-kernel escalation). The Linux fix sets a bug-fix bit (bit 33) in the AMD `BP_CFG` model-specific register (`0xc001102e`) via `msr_set_bit()` in `init_amd_zen2()`, and only on bare metal (skipped when `X86_FEATURE_HYPERVISOR` is set, as the mitigation is the host's responsibility for guests).
-
-**Why out of scope:** Not a transient or speculative execution vulnerability — this is an op-cache resource-isolation bug that causes *instruction corruption* (an integrity/correctness erratum), with no side-channel or speculative data-leak component, which places it outside the vulnerability class this tool detects. It is also undetectable by this tool's standard framework: the kernel deliberately adds no `/sys/devices/system/cpu/vulnerabilities/` entry, no `X86_BUG_*` flag (so nothing in `/proc/cpuinfo`), no dmesg message, and no kernel command-line parameter. The mitigation is an unconditional inline MSR bit-set with no greppable named symbol, so it leaves no handle for no-runtime (kernel image / `System.map`) detection. The only possible check would be a live read of `BP_CFG` bit 33, which requires root and the `msr` module, works on bare metal only (guests report `N/A`), and would be a bespoke one-off outside the established CVE-detection model — the same situation as the [JCC Erratum](#no-cve--jump-conditional-code-jcc-erratum) below, but for AMD.
-
 ## No CVE — Jump Conditional Code (JCC) Erratum
 
 - **Issue:** [#329](https://github.com/speed47/spectre-meltdown-checker/issues/329)

spectre-meltdown-checker.sh

@@ -13,7 +13,7 @@
 #
 # Stephane Lesimple
 #
-VERSION='26.36.0606627'
+VERSION='26.36.0703833'
 
 # --- Common paths and basedirs ---
 readonly VULN_SYSFS_BASE="/sys/devices/system/cpu/vulnerabilities"
@@ -381,6 +381,7 @@ fi
     readonly INTEL_FAM6_ARROWLAKE_U=$((0xB5))
     readonly INTEL_FAM6_LUNARLAKE_M=$((0xBD))   # /* Lion Cove / Skymont */
     readonly INTEL_FAM6_PANTHERLAKE_L=$((0xCC)) # /* Cougar Cove / Darkmont */
+    readonly INTEL_FAM6_PANTHERLAKE_R=$((0xE5)) # /* Cougar Cove / Darkmont */
     readonly INTEL_FAM6_WILDCATLAKE_L=$((0xD5))
     readonly INTEL_FAM18_NOVALAKE=$((0x01))            # /* Coyote Cove / Arctic Wolf */
     readonly INTEL_FAM18_NOVALAKE_L=$((0x03))          # /* Coyote Cove / Arctic Wolf */
@@ -4495,41 +4496,25 @@ check_kernel_cpu_arch_mismatch() {
 # >>>>>> libs/370_hw_vmm.sh <<<<<<
 
 # vim: set ts=4 sw=4 sts=4 et:
-
+# Check whether the system is running as a Xen paravirtualized guest
-# Probe Xen presence and guest type using the most reliable sources available.
+# Returns: 0 if Xen PV, 1 otherwise
-# Prefer /sys/hypervisor when avalable, fallback to dmesg otherwise.
-# Caches results in g_xen (1/0) and g_xen_guest_type (PV|PVH|HVM|'').
-_detect_xen() {
-    [ "${g_xen_cached:-0}" = 1 ] && return
-    g_xen=0
-    g_xen_guest_type=''
-    g_xen_cached=1
-
-    # Most reliable: /sys/hypervisor/type is 'xen' on any Xen domain (dom0
-    # included), and /sys/hypervisor/guest_type reports PV, PVH or HVM.
-    if [ -r /sys/hypervisor/type ] && [ "$(cat /sys/hypervisor/type 2>/dev/null)" = xen ]; then
-        g_xen=1
-        if [ -r /sys/hypervisor/guest_type ]; then
-            g_xen_guest_type=$(cat /sys/hypervisor/guest_type 2>/dev/null)
-        fi
-        return
-    fi
-
-    # Fallback for kernels without /sys/hypervisor: /proc/xen plus a dmesg probe.
-    if [ -d "$g_procfs/xen" ]; then
-        dmesg_grep 'Booting paravirtualized kernel on Xen$'
-        case $? in
-            0) g_xen=1 ;;
-            2) pr_warn "dmesg truncated, Xen detection will be unreliable. Please reboot and relaunch this script" ;;
-        esac
-    fi
-}
-
-# Check whether the system is running on Xen (any domain type, dom0 included).
-# Returns: 0 if Xen, 1 otherwise
 is_xen() {
-    _detect_xen
+    local ret
-    [ "$g_xen" = 1 ]
+    if [ ! -d "$g_procfs/xen" ]; then
+        return 1
+    fi
+
+    # XXX do we have a better way that relying on dmesg?
+    dmesg_grep 'Booting paravirtualized kernel on Xen$'
+    ret=$?
+    if [ "$ret" -eq 2 ]; then
+        pr_warn "dmesg truncated, Xen detection will be unreliable. Please reboot and relaunch this script"
+        return 1
+    elif [ "$ret" -eq 0 ]; then
+        return 0
+    else
+        return 1
+    fi
 }
 
 # Check whether the system is a Xen Dom0 (privileged domain)
@@ -4546,77 +4531,31 @@ is_xen_dom0() {
     fi
 }
 
-# Check whether the system is running as a Xen PV DomU (the only Xen guest type
+# Check whether the system is a Xen DomU (unprivileged PV guest)
-# affected by Meltdown, which needs Xen-level mitigation).
+# Returns: 0 if DomU, 1 otherwise
-# Returns: 0 if PV DomU, 1 otherwise
 is_xen_domU() {
     local ret
     if ! is_xen; then
         return 1
     fi
 
-    if is_xen_dom0; then
+    # PVHVM guests also print 'Booting paravirtualized kernel', so we need this check.
-        return 1
-    fi
-
-    # When the reliable guest type is known, only PV domains (which aren't
-    # dom0, checked above) are the PV DomU case. PVH and HVM guests are not.
-    if [ -n "$g_xen_guest_type" ]; then
-        [ "$g_xen_guest_type" = PV ] && return 0
-        return 1
-    fi
-
-    # Fallback (no /sys/hypervisor/guest_type): PVHVM guests also print the
-    # 'Booting paravirtualized kernel' line, so exclude them via dmesg.
     dmesg_grep 'Xen HVM callback vector for event delivery is enabled$'
     ret=$?
     if [ "$ret" -eq 0 ]; then
         return 1
     fi
 
+    if ! is_xen_dom0; then
         return 0
+    else
+        return 1
+    fi
 }
 
-# Check whether we're running inside an OS-level container (LXC, Docker,
+# Check whether the system is running as a guest inside a virtual machine.
-# systemd-nspawn, etc.). Containers share the host kernel, so host/hypervisor
-# introspection (e.g. telling a Xen dom0 from a domU) is unreliable from inside
-# one: /proc/xen is exposed but empty, dmesg is the host's, etc. (issue #173)
-# Returns: 0 if in a container, 1 otherwise
-# Sets: g_is_container (1/0), g_container_reason
-is_running_in_container() {
-    local ctype
-    if [ "${g_is_container_cached:-0}" != 1 ]; then
-        g_is_container=0
-        g_container_reason=''
-        # systemd and most runtimes export 'container=' to PID 1's environment
-        if [ -r "$g_procfs/1/environ" ]; then
-            ctype=$(tr '\0' '\n' <"$g_procfs/1/environ" 2>/dev/null | sed -n 's/^container=//p' | head -n1)
-            if [ -n "$ctype" ]; then
-                g_is_container=1
-                g_container_reason="container=$ctype in $g_procfs/1/environ"
-            fi
-        fi
-        # Docker (and some others) drop a marker file at the filesystem root
-        if [ "$g_is_container" = 0 ] && [ -e /.dockerenv ]; then
-            g_is_container=1
-            g_container_reason="/.dockerenv present"
-        fi
-        # cgroup membership often reveals the runtime (lxc, docker, kubepods, ...)
-        if [ "$g_is_container" = 0 ] && [ -r "$g_procfs/1/cgroup" ]; then
-            if grep -qE '(^|[:/])(lxc|docker|kubepods|libpod|containerd|machine\.slice)([/.]|$)' "$g_procfs/1/cgroup" 2>/dev/null; then
-                g_is_container=1
-                g_container_reason="container runtime found in $g_procfs/1/cgroup"
-            fi
-        fi
-        g_is_container_cached=1
-    fi
-    [ "$g_is_container" = 1 ]
-}
-
-# Check whether the system is running as a guest inside a VM.
 # Uses the 'hypervisor' CPUID feature flag exposed in /proc/cpuinfo by KVM,
 # VMware, Hyper-V, VirtualBox, and most other type-1 and type-2 hypervisors.
-# Xen PV/PVH DomUs don't set that flag, so they're detected separately.
 # Returns: 0 if running as a VM guest, 1 otherwise
 # Sets: g_is_guest_vm (1=guest, 0=not a guest), g_is_guest_vm_reason
 is_running_as_guest() {
@@ -4627,13 +4566,6 @@ is_running_as_guest() {
             g_is_guest_vm=1
             g_is_guest_vm_reason="'hypervisor' flag in $g_procfs/cpuinfo"
         fi
-        # Xen PV/PVH DomUs don't expose the 'hypervisor' CPUID flag. Don't
-        # classify a container on a Xen host as a guest here: we can't tell
-        # dom0 from domU from inside a container (handled separately).
-        if [ "$g_is_guest_vm" = 0 ] && is_xen && ! is_xen_dom0 && ! is_running_in_container; then
-            g_is_guest_vm=1
-            g_is_guest_vm_reason="Xen ${g_xen_guest_type:-PV} DomU"
-        fi
         g_is_guest_vm_cached=1
     fi
     [ "$g_is_guest_vm" = 1 ]
@@ -5158,22 +5090,6 @@ check_cpu() {
                 pstatus green NO
             fi
         fi
-        # ARM exposes no userspace-readable CPUID/MSR to query SSBD support directly.
-        # The ARMv8.5 SSBS ("Speculative Store Bypass Safe") hardware bit, when present,
-        # surfaces as the 'ssbs' hwcap in /proc/cpuinfo. We use it *only* as a positive
-        # confirmation of SSB mitigation capability (Variant 4 / CVE-2018-3639): its
-        # absence proves nothing, because the kernel deliberately hides the hwcap on some
-        # cores (e.g. the erratum-3194386 SSBS self-sync workaround), so we must never
-        # infer immunity from a missing 'ssbs'.
-        if has_runtime; then
-            pr_info_nol "  * CPU indicates SSBS (Speculative Store Bypass Safe) capability: "
-            if grep '^Features' "$g_procfs/cpuinfo" | grep -qw ssbs; then
-                cap_ssbd='ARM SSBS (cpuinfo)'
-                pstatus green YES "$cap_ssbd"
-            else
-                pstatus blue UNKNOWN "not exposed (the kernel may hide it; cannot conclude)"
-            fi
-        fi
         return
     fi
 
@@ -6518,12 +6434,6 @@ check_mds_linux() {
                 if echo "$ret_sys_interface_check_fullmsg" | grep -Eq 'SMT (disabled|mitigated)'; then
                     mds_smt_mitigated=1
                     pstatus green YES
-                elif echo "$ret_sys_interface_check_fullmsg" | grep -q 'SMT Host state unknown'; then
-                    # The kernel appends "SMT Host state unknown" when running under
-                    # a hypervisor (X86_FEATURE_HYPERVISOR): the host controls SMT
-                    # scheduling, so it can't be determined from inside the guest (#343).
-                    mds_smt_mitigated=2
-                    pstatus yellow UNKNOWN "running in a VM guest, the hypervisor host controls SMT"
                 else
                     mds_smt_mitigated=0
                     pstatus yellow NO
@@ -6550,9 +6460,6 @@ check_mds_linux() {
                             if [ "$opt_paranoid" != 1 ] || [ "$mds_smt_mitigated" = 1 ]; then
                                 mystatus=OK
                                 mymsg="Your microcode and kernel are both up to date for this mitigation, and mitigation is enabled"
-                            elif [ "$mds_smt_mitigated" = 2 ]; then
-                                mystatus=UNK
-                                mymsg="Your microcode and kernel are both up to date for this mitigation and it's enabled, but SMT (Hyper-Threading) cross-thread protection can't be verified from inside a VM guest: it depends on the hypervisor host's SMT/core-scheduling configuration"
                             else
                                 mystatus=VULN
                                 mymsg="Your microcode and kernel are both up to date for this mitigation, but you must disable SMT (Hyper-Threading) for a complete mitigation"
@@ -6820,12 +6727,6 @@ check_mmio_linux() {
                 if echo "$ret_sys_interface_check_fullmsg" | grep -Eq 'SMT (disabled|mitigated)'; then
                     mmio_smt_mitigated=1
                     pstatus green YES
-                elif echo "$ret_sys_interface_check_fullmsg" | grep -q 'SMT Host state unknown'; then
-                    # The kernel appends "SMT Host state unknown" when running under
-                    # a hypervisor (X86_FEATURE_HYPERVISOR): the host controls SMT
-                    # scheduling, so it can't be determined from inside the guest (#343).
-                    mmio_smt_mitigated=2
-                    pstatus yellow UNKNOWN "running in a VM guest, the hypervisor host controls SMT"
                 else
                     mmio_smt_mitigated=0
                     pstatus yellow NO
@@ -6863,9 +6764,6 @@ check_mmio_linux() {
                             if [ "$opt_paranoid" != 1 ] || [ "$mmio_smt_mitigated" = 1 ]; then
                                 mystatus=OK
                                 mymsg="Your microcode and kernel are both up to date for this mitigation, and mitigation is enabled"
-                            elif [ "$mmio_smt_mitigated" = 2 ]; then
-                                mystatus=UNK
-                                mymsg="Your microcode and kernel are both up to date for this mitigation and it's enabled, but SMT (Hyper-Threading) cross-thread protection can't be verified from inside a VM guest: it depends on the hypervisor host's SMT/core-scheduling configuration"
                             else
                                 mystatus=VULN
                                 mymsg="Your microcode and kernel are both up to date for this mitigation, but you must disable SMT (Hyper-Threading) for a complete mitigation"
@@ -9056,7 +8954,7 @@ check_CVE_2017_5754() {
 }
 
 check_CVE_2017_5754_linux() {
-    local status sys_interface_available msg kpti_support kpti_can_tell kpti_enabled dmesg_grep pti_xen_pv_domU xen_pv_domo xen_pv_domu xen_unknown_container explain_text
+    local status sys_interface_available msg kpti_support kpti_can_tell kpti_enabled dmesg_grep pti_xen_pv_domU xen_pv_domo xen_pv_domu explain_text
     status=UNK
     sys_interface_available=0
     msg=''
@@ -9178,24 +9076,14 @@ check_CVE_2017_5754_linux() {
     # Test if the current host is a Xen PV Dom0 / DomU
     xen_pv_domo=0
     xen_pv_domu=0
-    xen_unknown_container=0
-    if is_xen && ! is_xen_dom0 && is_running_in_container; then
-        # We can see Xen, but we're inside a container so /proc/xen/capabilities
-        # isn't exposed and dmesg is the host's: we can't tell a safe Dom0 from
-        # a vulnerable PV DomU from in here (issue #173).
-        xen_unknown_container=1
-    else
     is_xen_dom0 && xen_pv_domo=1
     is_xen_domU && xen_pv_domu=1
-    fi
 
     if [ "$g_mode" = live ]; then
         # checking whether we're running under Xen PV 64 bits. If yes, we are affected by affected_variant3
         # (unless we are a Dom0)
         pr_info_nol "* Running as a Xen PV DomU: "
-        if [ "$xen_unknown_container" = 1 ]; then
+        if [ "$xen_pv_domu" = 1 ]; then
-            pstatus yellow UNKNOWN "running in a container, can't query Xen from here"
-        elif [ "$xen_pv_domu" = 1 ]; then
             pstatus yellow YES
         else
             pstatus blue NO
@@ -9208,10 +9096,7 @@ check_CVE_2017_5754_linux() {
     elif [ -z "$msg" ]; then
         # if msg is empty, sysfs check didn't fill it, rely on our own test
         if [ "$g_mode" = live ]; then
-            if [ "$xen_unknown_container" = 1 ]; then
+            if [ "$kpti_enabled" = 1 ]; then
-                pvulnstatus "$cve" UNK "running inside a container on a Xen host, can't determine if the underlying domain is a vulnerable PV DomU"
-                explain "This system looks like a container ($g_container_reason) running on a Xen host. Whether the underlying domain is a safe Dom0 or a vulnerable PV DomU can't be reliably determined from inside a container (/proc/xen is exposed but empty, and dmesg belongs to the host). Please re-run this script directly on the host, outside the container, to get an accurate result."
-            elif [ "$kpti_enabled" = 1 ]; then
                 pvulnstatus "$cve" OK "PTI mitigates the vulnerability"
             elif [ "$xen_pv_domo" = 1 ]; then
                 pvulnstatus "$cve" OK "Xen Dom0s are safe and do not require PTI"
@@ -10244,11 +10129,6 @@ check_CVE_2019_11135_linux() {
                 pvulnstatus "$cve" VULN "TSX must be disabled for full mitigation"
             elif echo "$ret_sys_interface_check_fullmsg" | grep -qF 'SMT vulnerable'; then
                 pvulnstatus "$cve" VULN "SMT (HyperThreading) must be disabled for full mitigation"
-            elif echo "$ret_sys_interface_check_fullmsg" | grep -qF 'SMT Host state unknown'; then
-                # The kernel appends "SMT Host state unknown" when running under a
-                # hypervisor (X86_FEATURE_HYPERVISOR): the host controls SMT
-                # scheduling, so it can't be determined from inside the guest (#343).
-                pvulnstatus "$cve" UNK "TAA is mitigated and TSX is disabled, but SMT (Hyper-Threading) cross-thread protection can't be verified from inside a VM guest: it depends on the hypervisor host's SMT/core-scheduling configuration"
             else
                 pvulnstatus "$cve" "$status" "$msg"
             fi
@@ -11674,15 +11554,6 @@ check_CVE_2023_20593_linux() {
             fi
         fi
         if [ "$zenbleed_print_vuln" = 1 ]; then
-            if [ "$g_mode" = live ] && is_running_as_guest; then
-                # Both Zenbleed mitigations are applied at the host level: an
-                # up-to-date microcode, or the host kernel setting FP_BACKUP_FIX
-                # in DE_CFG. From inside a guest we can't read that MSR and can't
-                # trust the microcode version the hypervisor presents, so we can't
-                # confirm or deny the mitigation -- don't cry VULN (#488).
-                pvulnstatus "$cve" UNK "Zenbleed mitigation can't be verified from inside a VM guest ($g_is_guest_vm_reason): it may be applied by the hypervisor host, but that isn't observable from here"
-                explain "Zenbleed is mitigated either by an up-to-date CPU microcode or by the host kernel setting the FP_BACKUP_FIX bit (DE_CFG MSR 0xc0011029 bit 9). Both are host-level: a guest can neither read that MSR nor trust the microcode version the hypervisor presents (see the VM note in the hardware section above). Re-run this script on the hypervisor host to get an accurate result."
-            else
             pvulnstatus "$cve" VULN "Your kernel is too old to mitigate Zenbleed and your CPU microcode doesn't mitigate it either"
             explain "Your CPU vendor may have a new microcode for your CPU model that mitigates this issue (refer to the hardware section above).\n " \
                 "Otherwise, the Linux kernel is able to mitigate this issue regardless of the microcode version you have, but in this case\n " \
@@ -11691,7 +11562,6 @@ check_CVE_2023_20593_linux() {
                 "To manually mitigate the issue right now, you may use the following command: \`wrmsr -a 0xc0011029 \$((\$(rdmsr -c 0xc0011029) | (1<<9)))\`,\n " \
                 "however note that this manual mitigation will only be active until the next reboot."
         fi
-        fi
         unset zenbleed_print_vuln
     else
         pvulnstatus "$cve" "$status" "$msg"
@@ -13264,7 +13134,7 @@ exit 0                          # ok
 # with X being either I for Intel, or A for AMD
 # When the date is unknown it defaults to 20000101
 
-# %%% MCEDB v350+i20260512+1cce
+# %%% MCEDB v351+i20260512+1cce
 # I,0x00000611,0xFF,0x00000B27,19961218
 # I,0x00000612,0xFF,0x000000C6,19961210
 # I,0x00000616,0xFF,0x000000C6,19961210
@@ -13713,10 +13583,11 @@ exit 0                          # ok
 # I,0x000C06C3,0x90,0x0000011B,20260324
 # I,0x000C06F1,0x87,0x210002E0,20251217
 # I,0x000C06F2,0x87,0x210002E0,20251217
-# I,0x000D0650,0xFF,0x00000008,20260208
+# I,0x000D0650,0xFF,0x00000009,20260309
-# I,0x000D0651,0xFF,0x00000008,20260208
+# I,0x000D0651,0xFF,0x00000009,20260309
 # I,0x000D0670,0xFF,0x00000137,20260218
 # I,0x000D06D0,0xFF,0x80000370,20250917
+# I,0x000D06D1,0xFF,0x01000120,20260325
 # I,0x00FF0671,0xFF,0x0000010E,20220907
 # I,0x00FF0672,0xFF,0x0000000D,20210816
 # I,0x00FF0675,0xFF,0x0000000D,20210816
@@ -13818,8 +13689,8 @@ exit 0                          # ok
 # A,0x008A0F00,0xFF,0x08A0000B,20241125
 # A,0x00A00F00,0xFF,0x0A000033,20200413
 # A,0x00A00F10,0xFF,0x0A00107A,20240226
-# A,0x00A00F11,0xFF,0x0A0011DE,20250418
+# A,0x00A00F11,0xFF,0x0A0011DF,20260312
-# A,0x00A00F12,0xFF,0x0A001247,20250327
+# A,0x00A00F12,0xFF,0x0A00124B,20260305
 # A,0x00A00F80,0xFF,0x0A008005,20230707
 # A,0x00A00F82,0xFF,0x0A00820F,20241111
 # A,0x00A10F00,0xFF,0x0A10004B,20220309
@@ -13865,8 +13736,8 @@ exit 0                          # ok
 # A,0x00B10F10,0xFF,0x0B101059,20251105
 # A,0x00B20F40,0xFF,0x0B204037,20251019
 # A,0x00B40F00,0xFF,0x0B400034,20240318
-# A,0x00B40F40,0xFF,0x0B404035,20251020
+# A,0x00B40F40,0xFF,0x0B404038,20260408
-# A,0x00B40F41,0xFF,0x0B404108,20251020
+# A,0x00B40F41,0xFF,0x0B40410B,20260408
-# A,0x00B60F00,0xFF,0x0B600037,20251019
+# A,0x00B60F00,0xFF,0x0B60003C,20260401
-# A,0x00B60F80,0xFF,0x0B608038,20251019
+# A,0x00B60F80,0xFF,0x0B60803C,20260401
 # A,0x00B70F00,0xFF,0x0B700037,20251019