Stéphane Lesimple
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b7a6182a65
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doc: add Jump Conditional Code (JCC) Erratum to the unsupported list
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2026-04-20 17:47:50 +02:00 |
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Stéphane Lesimple
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e2d110a3b5
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doc: update output formats doc + normalize json to bool
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2026-04-20 12:55:34 +02:00 |
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Stéphane Lesimple
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1bb33d5cf2
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chore: remove from test branch workflows that must live on master
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2026-04-20 12:53:36 +02:00 |
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Stéphane Lesimple
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6732eb141b
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doc: CVE-2018-3665 (Lazy FP State Restore (LazyFP)), unsupported
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2026-04-19 12:49:17 +02:00 |
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Stéphane Lesimple
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048ce5b6a2
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enh: add FPDSS check for AMD Zen1/Zen+ (CVE-2025-54505)
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2026-04-18 17:18:42 +02:00 |
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Stéphane Lesimple
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48454a5344
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fix: remove useless checks under ARM for CVE-2023-28746
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2026-04-10 19:50:15 +02:00 |
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Stéphane Lesimple
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e67c9e4265
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enh: use g_mode to explicitly save/load the current running mode
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2026-04-10 19:28:10 +02:00 |
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Stéphane Lesimple
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f7ba617e16
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enh: guard x86/arm specific checks in kernel/cpu for the proper arch
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2026-04-10 19:28:10 +02:00 |
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Stéphane Lesimple
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e110706df8
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enh: factorize is_arch_kernel
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2026-04-10 18:37:14 +02:00 |
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Stéphane Lesimple
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de853fc801
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chore: fix build workflow
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2026-04-08 23:00:40 +02:00 |
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Stéphane Lesimple
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98ec067aef
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enh: rework json/prom output to better split x86/arm
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2026-04-08 22:58:36 +02:00 |
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Stéphane Lesimple
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ff42393fa6
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new batch mode docs, add doc/ to -build branch
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2026-04-08 22:58:36 +02:00 |
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Stéphane Lesimple
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f0fb59310e
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fix: add a missing pstatus to CVE-2023-20588 check
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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be0f2d20d2
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fix: remove misleading explain on correctly mitigated SLS
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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3639de9e8a
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chore: fix github workflow check with new --batch output
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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df3c2aeaa3
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add screenshot to README
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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945f70bb63
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fix: early abort when using --allow-msr-write
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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db84fc10de
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chore: make fmt
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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60ea669e41
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enh: better explain the 4 run modes
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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f1c0d5548c
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chg: remove --no-intel-db, it's now always used when available
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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9e617a4363
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remove prometheus-legacy format
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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b9c203120b
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enh: --no-runtime and --no-hw modes replacing --live and implicit 'offline' mode
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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3f7e0a11f7
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enh: CVE-2018-3640 (Spectre 3a): enhance ARM mitigation detection
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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5c469787ea
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enh: rework --batch nrpe entirely
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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a952fe32c4
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fix: exit_cleanup: don't lose passed exit code
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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61fa02d577
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feat: rework the --batch prometheus output entirely
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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39dea1245e
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feat: rework the --batch json output entirely
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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3afbda8430
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enh: when reading CPUID is unavailable (VM?), fallback to cpuinfo where applicable
cap_* variable <= cpuinfo flag
cap_ibrs <= ibrs
cap_ibpb <= ibpb
cap_stibp <= stibp
cap_ssbd <= ssbd / virt_ssbd
cap_l1df <= flush_l1d
cap_md_clear <= md_clear
cap_arch_capabilities <= arch_capabilities
Should fix #288
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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6d69ce9a77
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enh: read/write_msr: clearer error messages
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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3ebfba2ac2
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fix: CVE-2017-5715 (Spectre V2): Red Hat specific fix for RSB Filling (fixes #235)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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a3f6553e65
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fix: read/write msr and lockdown: fix a variable error, properly report lockdown to users
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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42ed8efa65
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fix: better compatibility under busybox, silence buggy unzlma versions (fix #432)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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2c766b7cc6
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fix: wrmsr: specify core number (closes #294)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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49472f1b64
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enh: clearer kernel info section at the top of the script
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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333aa74fea
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enh: clearer CPU details section
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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8d9504d174
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chore: add comment about is_intel/amd/hygon recursion
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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6043f586ef
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enh: update IntelDB affected CPU list to 2026-04 data, including Hybrid CPU detection
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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e1ace7c281
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doc: document Platypus (CVE-2020-8694 CVE-2020-8695) as out of scope (#384)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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24ab98d757
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doc: document CVE-2020-24511 and CVE-2020-24512 as being out of scope along with rationale (#409)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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155b3808b9
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fix: CPUs affected by MSBDS but not MDS (fix #351)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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b6a41918b0
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doc: add CVE-2019-11157 (Plundervolt) to unsupported CVE list
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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3c56ac35dd
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fix: better detect kernel lockdown & no longer require cap_flush_cmd to deem CVE-2018-3615 as mitigated (fix #296)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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b0bb1f4676
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feat: implement check for MMIO Stale Data (CVE-2022-21123 CVE-2022-21125 CVE-2022-21166) (#437)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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0fa7e44327
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doc: add Blindside to unsupported list (#374)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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f100b4e1dc
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doc: add CVE-2020-0549 (L1D Eviction Sampling, CacheOut) as unsupported
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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6332fc3405
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fix: CVE-2019-11135 (TAA) detect new 0x10F MSR for TSX-disabled CPUs (#414)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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3c61c7489b
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fix: CVE-2024-3635[0,7] don't print lines about TSA CPUID bits under non-AMD
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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3d01978cd4
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feat: add CVE-2023-20588 (AMD DIV0 bug) (#473)
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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53c45e3363
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doc: update dev guidelines
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2026-04-08 22:35:53 +02:00 |
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Stéphane Lesimple
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acf8b585a5
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doc: add CVE-2024-2201 (Native BHI) and TLBleed as unsupported
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2026-04-08 22:35:53 +02:00 |
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