diff --git a/spectre-meltdown-checker.sh b/spectre-meltdown-checker.sh index 461c983..881e8f5 100755 --- a/spectre-meltdown-checker.sh +++ b/spectre-meltdown-checker.sh @@ -13,7 +13,7 @@ # # Stephane Lesimple # -VERSION='26.32.0406653' +VERSION='26.32.0406697' # --- Common paths and basedirs --- readonly VULN_SYSFS_BASE="/sys/devices/system/cpu/vulnerabilities" @@ -2878,20 +2878,27 @@ readonly WRITE_MSR_RET_ERR=2 readonly WRITE_MSR_RET_LOCKDOWN=3 # Write a value to an MSR register across one or all cores # Args: $1=msr_address $2=value(optional) $3=cpu_index(optional, default 0) -# Sets: ret_write_msr_msg +# Sets: ret_write_msr_msg, ret_write_msr_ADDR_msg (where ADDR is the hex address, e.g. ret_write_msr_0x123_msg) # Returns: WRITE_MSR_RET_OK | WRITE_MSR_RET_KO | WRITE_MSR_RET_ERR | WRITE_MSR_RET_LOCKDOWN write_msr() { - local ret core first_core_ret + local ret core first_core_ret msr_dec msr + msr_dec=$(($1)) + msr=$(printf "0x%x" "$msr_dec") if [ "$opt_cpu" != all ]; then # we only have one core to write to, do it and return the result write_msr_one_core "$opt_cpu" "$@" - return $? + ret=$? + # shellcheck disable=SC2163 + eval "ret_write_msr_${msr}_msg=\$ret_write_msr_msg" + return $ret fi # otherwise we must write on all cores for core in $(seq 0 "$g_max_core_id"); do write_msr_one_core "$core" "$@" ret=$? + # shellcheck disable=SC2163 + eval "ret_write_msr_${msr}_msg=\$ret_write_msr_msg" if [ "$core" = 0 ]; then # save the result of the first core, for comparison with the others first_core_ret=$ret @@ -2899,6 +2906,8 @@ write_msr() { # compare first core with the other ones if [ "$first_core_ret" != "$ret" ]; then ret_write_msr_msg="result is not homogeneous between all cores, at least core 0 and $core differ!" + # shellcheck disable=SC2163 + eval "ret_write_msr_${msr}_msg=\$ret_write_msr_msg" return $WRITE_MSR_RET_ERR fi fi @@ -3054,20 +3063,28 @@ readonly READ_MSR_RET_ERR=2 readonly READ_MSR_RET_LOCKDOWN=3 # Read an MSR register value across one or all cores # Args: $1=msr_address $2=cpu_index(optional, default 0) -# Sets: ret_read_msr_value, ret_read_msr_value_hi, ret_read_msr_value_lo, ret_read_msr_msg +# Sets: ret_read_msr_value, ret_read_msr_value_hi, ret_read_msr_value_lo, ret_read_msr_msg, +# ret_read_msr_ADDR_msg (where ADDR is the hex address, e.g. ret_read_msr_0x10a_msg) # Returns: READ_MSR_RET_OK | READ_MSR_RET_KO | READ_MSR_RET_ERR | READ_MSR_RET_LOCKDOWN read_msr() { - local ret core first_core_ret first_core_value + local ret core first_core_ret first_core_value msr_dec msr + msr_dec=$(($1)) + msr=$(printf "0x%x" "$msr_dec") if [ "$opt_cpu" != all ]; then # we only have one core to read, do it and return the result read_msr_one_core "$opt_cpu" "$@" - return $? + ret=$? + # shellcheck disable=SC2163 + eval "ret_read_msr_${msr}_msg=\$ret_read_msr_msg" + return $ret fi # otherwise we must read all cores for core in $(seq 0 "$g_max_core_id"); do read_msr_one_core "$core" "$@" ret=$? + # shellcheck disable=SC2163 + eval "ret_read_msr_${msr}_msg=\$ret_read_msr_msg" if [ "$core" = 0 ]; then # save the result of the first core, for comparison with the others first_core_ret=$ret @@ -3076,6 +3093,8 @@ read_msr() { # compare first core with the other ones if [ "$first_core_ret" != "$ret" ] || [ "$first_core_value" != "$ret_read_msr_value" ]; then ret_read_msr_msg="result is not homogeneous between all cores, at least core 0 and $core differ!" + # shellcheck disable=SC2163 + eval "ret_read_msr_${msr}_msg=\$ret_read_msr_msg" return $READ_MSR_RET_ERR fi fi @@ -4345,7 +4364,7 @@ check_cpu() { elif [ "$spec_ctrl_msr" = 0 ]; then pstatus yellow NO else - pstatus yellow UNKNOWN "is msr kernel module available?" + pstatus yellow UNKNOWN "$ret_read_msr_msg" fi pr_info_nol " * CPU indicates STIBP capability: " @@ -4770,7 +4789,8 @@ check_cpu() { elif [ "$cap_tsx_ctrl_rtm_disable" = 0 ]; then pstatus blue NO else - pstatus yellow UNKNOWN "couldn't read MSR" + # shellcheck disable=SC2154 + pstatus yellow UNKNOWN "$ret_read_msr_0x122_msg" fi pr_info_nol " * TSX_CTRL MSR indicates TSX CPUID bit is cleared: " @@ -4779,7 +4799,8 @@ check_cpu() { elif [ "$cap_tsx_ctrl_cpuid_clear" = 0 ]; then pstatus blue NO else - pstatus yellow UNKNOWN "couldn't read MSR" + # shellcheck disable=SC2154 + pstatus yellow UNKNOWN "$ret_read_msr_0x122_msg" fi fi @@ -4804,7 +4825,8 @@ check_cpu() { pr_info_nol " * GDS microcode mitigation is disabled (GDS_MITG_DIS): " if [ "$cap_gds_mitg_dis" = -1 ]; then - pstatus yellow UNKNOWN "couldn't read MSR" + # shellcheck disable=SC2154 + pstatus yellow UNKNOWN "$ret_read_msr_0x123_msg" elif [ "$cap_gds_mitg_dis" = 1 ]; then pstatus yellow YES else @@ -4813,7 +4835,8 @@ check_cpu() { pr_info_nol " * GDS microcode mitigation is locked in enabled state (GDS_MITG_LOCK): " if [ "$cap_gds_mitg_lock" = -1 ]; then - pstatus yellow UNKNOWN "couldn't read MSR" + # shellcheck disable=SC2154 + pstatus yellow UNKNOWN "$ret_read_msr_0x123_msg" elif [ "$cap_gds_mitg_lock" = 1 ]; then pstatus blue YES else @@ -5001,7 +5024,8 @@ check_cpu() { elif [ "$cap_tsx_force_abort_rtm_disable" = 0 ]; then pstatus blue NO else - pstatus yellow UNKNOWN "couldn't read MSR" + # shellcheck disable=SC2154 + pstatus yellow UNKNOWN "$ret_read_msr_0x10f_msg" fi pr_info_nol " * TSX_FORCE_ABORT MSR indicates TSX CPUID bit is cleared: " @@ -5010,7 +5034,8 @@ check_cpu() { elif [ "$cap_tsx_force_abort_cpuid_clear" = 0 ]; then pstatus blue NO else - pstatus yellow UNKNOWN "couldn't read MSR" + # shellcheck disable=SC2154 + pstatus yellow UNKNOWN "$ret_read_msr_0x10f_msg" fi fi