From f33d65ff7101761de6bf3e174033ccdef181d0e7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?St=C3=A9phane=20Lesimple?= Date: Tue, 22 May 2018 09:38:29 +0200 Subject: [PATCH] feat(variant3a): add information about microcode-sufficient mitigation --- spectre-meltdown-checker.sh | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/spectre-meltdown-checker.sh b/spectre-meltdown-checker.sh index 032c42f..6c74c61 100755 --- a/spectre-meltdown-checker.sh +++ b/spectre-meltdown-checker.sh @@ -2886,12 +2886,19 @@ check_variant3a() { _info "\033[1;34mCVE-2018-3640 [rogue system register read] aka 'Variant 3a'\033[0m" + status=UNK + sys_interface_available=0 + msg='' + + _info_nol " * CPU microcode mitigates the vulnerability:" + pstatus yellow UNKNOWN "an up to date microcode is sufficient to mitigate this vulnerability, detection will be implemented soon" + cve='CVE-2018-3640' if ! is_cpu_vulnerable 3a; then # override status & msg in case CPU is not vulnerable after all pvulnstatus $cve OK "your CPU vendor reported your CPU model as not vulnerable" else - pvulnstatus $cve UNK "new vulnerability, script will be updated when more technical information is available in the next hours/days" + pvulnstatus $cve VULN "a new microcode will mitigate this vulnerability" fi }