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enh: factorize is_arch_kernel
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@@ -3,7 +3,7 @@
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# CVE-2018-3640, Variant 3a, Rogue System Register Read
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check_CVE_2018_3640() {
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local status sys_interface_available msg cve is_arm64_kernel arm_v3a_mitigation
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local status sys_interface_available msg cve arm_v3a_mitigation
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cve='CVE-2018-3640'
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pr_info "\033[1;34m$cve aka '$(cve2name "$cve")'\033[0m"
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@@ -11,21 +11,7 @@ check_CVE_2018_3640() {
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sys_interface_available=0
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msg=''
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# Detect whether the target kernel is ARM64, for both live and no-runtime modes.
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# In no-runtime cross-inspection (x86 host, ARM kernel), cpu_vendor reflects the host,
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# so also check for arm64_sys_ symbols (same pattern used in CVE-2018-3639).
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is_arm64_kernel=0
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if [ "$cpu_vendor" = ARM ] || [ "$cpu_vendor" = CAVIUM ] || [ "$cpu_vendor" = PHYTIUM ]; then
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is_arm64_kernel=1
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elif [ -n "$opt_map" ] && grep -q 'arm64_sys_' "$opt_map" 2>/dev/null; then
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is_arm64_kernel=1
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elif [ -n "$g_kernel" ] && grep -q 'arm64_sys_' "$g_kernel" 2>/dev/null; then
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is_arm64_kernel=1
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elif [ -n "$opt_config" ] && grep -qw 'CONFIG_ARM64=y' "$opt_config" 2>/dev/null; then
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is_arm64_kernel=1
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fi
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if [ "$is_arm64_kernel" = 1 ]; then
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if is_arm64_kernel; then
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# ARM64: mitigation is via an EL2 indirect trampoline (spectre_v3a_enable_mitigation),
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# applied automatically at boot for affected CPUs (Cortex-A57, Cortex-A72).
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# No microcode update is involved.
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