peter/spectre-meltdown-checker
1
0
Fork 0
mirror of https://github.com/speed47/spectre-meltdown-checker.git synced 2026-04-03 13:47:08 +02:00
Code Issues Projects Releases Wiki Activity

enh: auto-generate intel model list

Browse Source
This commit is contained in:
Stéphane Lesimple
2026-04-02 22:24:43 +02:00
parent 4f6dbb36c8
commit b9f75346d4
3 changed files with 82 additions and 70 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
.github/workflows/build.yml vendored
View File

@@ -17,6 +17,8 @@ jobs:
persist-credentials: true persist-credentials: true
- name: install prerequisites - name: install prerequisites
run: sudo apt-get update && sudo apt-get install -y shellcheck shfmt jq sqlite3 iucode-tool make run: sudo apt-get update && sudo apt-get install -y shellcheck shfmt jq sqlite3 iucode-tool make
- name: update Intel model list
run: ./scripts/update_intel_models.sh
- name: build and check - name: build and check
run: | run: |
make build fmt-check shellcheck make build fmt-check shellcheck

80
scripts/update_intel_models.sh Executable file
View File

@@ -0,0 +1,80 @@
#!/bin/sh
# vim: set ts=4 sw=4 sts=4 et:
# Download and parse Linux kernel's intel-family.h to generate src/libs/003_intel_models.sh.
# Usage: scripts/update_intel_models.sh
set -eu
SCRIPTDIR="$(cd "$(dirname "$0")" && pwd)"
REPODIR="$(dirname "$SCRIPTDIR")"
OUTFILE="$REPODIR/src/libs/003_intel_models.sh"
URL="https://raw.githubusercontent.com/torvalds/linux/refs/heads/master/arch/x86/include/asm/intel-family.h"
TMPFILE=$(mktemp /tmp/intel-family-XXXXXX.h)
trap 'rm -f "$TMPFILE"' EXIT INT TERM
echo "Downloading $URL ..."
wget -q -O "$TMPFILE" "$URL"
echo "Parsing intel-family.h ..."
{
cat <<'HEADER'
# vim: set ts=4 sw=4 sts=4 et:
# AUTO-GENERATED FILE — DO NOT EDIT MANUALLY.
# Generated by scripts/update_intel_models.sh from:
# https://raw.githubusercontent.com/torvalds/linux/refs/heads/master/arch/x86/include/asm/intel-family.h
# Run scripts/update_intel_models.sh to refresh when new Intel CPU families are added to the kernel.
# shellcheck disable=SC2034
{
HEADER
awk '
/^#define INTEL_[A-Z0-9_]+[[:space:]]+IFM\(/ {
name = $2
# Skip wildcard and notational markers
if (name == "INTEL_ANY") next
if (name ~ /_START$/) next
if (name ~ /_LAST$/) next
# Extract the IFM(...) argument string
line = $0
sub(/.*IFM\(/, "", line) # line is now: "N, 0xNN) ..."
# Extract family
family = line
sub(/,.*/, "", family)
gsub(/[[:space:]]/, "", family)
# Skip non-numeric families (e.g. X86_FAMILY_ANY)
if (family !~ /^[0-9]+$/) next
# Extract model
rest = line
sub(/^[^,]+, */, "", rest) # remove "N, "
model = rest
sub(/\).*/, "", model)
gsub(/[[:space:]]/, "", model)
# Extract optional C comment and convert to shell comment
comment = ""
if (index($0, "/*") > 0) {
c = $0
sub(/.*\/\*/, "/* ", c)
gsub(/ +/, " ", c)
sub(/ *\*\/.*/, " */", c)
comment = "\t# " c
}
# Strip INTEL_ prefix; prepend INTEL_FAM<family>_
sub(/^INTEL_/, "", name)
varname = "INTEL_FAM" family "_" name
printf "\treadonly %s=$(( %s ))%s\n", varname, model, comment
}
' "$TMPFILE"
printf '}\n'
} | shfmt -i 4 -ci -ln bash > "$OUTFILE"
echo "Generated $OUTFILE ($(wc -l < "$OUTFILE") lines)"

70
src/libs/350_cpu_detect2.sh
View File

@@ -163,76 +163,6 @@ parse_cpu_details() {
g_ucode_found=$(printf "family 0x%x model 0x%x stepping 0x%x ucode 0x%x cpuid 0x%x pfid 0x%x" \ g_ucode_found=$(printf "family 0x%x model 0x%x stepping 0x%x ucode 0x%x cpuid 0x%x pfid 0x%x" \
"$cpu_family" "$cpu_model" "$cpu_stepping" "$cpu_ucode" "$cpu_cpuid" "$cpu_platformid") "$cpu_family" "$cpu_model" "$cpu_stepping" "$cpu_ucode" "$cpu_cpuid" "$cpu_platformid")
# also define those that we will need in other funcs
# taken from https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/x86/include/asm/intel-family.h
# curl -s 'https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/plain/arch/x86/include/asm/intel-family.h' | awk '/#define INTEL_FAM6/ {print $2"=$(( "$3" )) # "$4,$5,$6,$7,$8,$9}' | sed -Ee 's/ +$//'
# shellcheck disable=SC2034
{
readonly INTEL_FAM6_CORE_YONAH=$((0x0E)) #
readonly INTEL_FAM6_CORE2_MEROM=$((0x0F)) #
readonly INTEL_FAM6_CORE2_MEROM_L=$((0x16)) #
readonly INTEL_FAM6_CORE2_PENRYN=$((0x17)) #
readonly INTEL_FAM6_CORE2_DUNNINGTON=$((0x1D)) #
readonly INTEL_FAM6_NEHALEM=$((0x1E)) #
readonly INTEL_FAM6_NEHALEM_G=$((0x1F)) # /* Auburndale / Havendale */
readonly INTEL_FAM6_NEHALEM_EP=$((0x1A)) #
readonly INTEL_FAM6_NEHALEM_EX=$((0x2E)) #
readonly INTEL_FAM6_WESTMERE=$((0x25)) #
readonly INTEL_FAM6_WESTMERE_EP=$((0x2C)) #
readonly INTEL_FAM6_WESTMERE_EX=$((0x2F)) #
readonly INTEL_FAM6_SANDYBRIDGE=$((0x2A)) #
readonly INTEL_FAM6_SANDYBRIDGE_X=$((0x2D)) #
readonly INTEL_FAM6_IVYBRIDGE=$((0x3A)) #
readonly INTEL_FAM6_IVYBRIDGE_X=$((0x3E)) #
readonly INTEL_FAM6_HASWELL=$((0x3C)) #
readonly INTEL_FAM6_HASWELL_X=$((0x3F)) #
readonly INTEL_FAM6_HASWELL_L=$((0x45)) #
readonly INTEL_FAM6_HASWELL_G=$((0x46)) #
readonly INTEL_FAM6_BROADWELL=$((0x3D)) #
readonly INTEL_FAM6_BROADWELL_G=$((0x47)) #
readonly INTEL_FAM6_BROADWELL_X=$((0x4F)) #
readonly INTEL_FAM6_BROADWELL_D=$((0x56)) #
readonly INTEL_FAM6_SKYLAKE_L=$((0x4E)) # /* Sky Lake */
readonly INTEL_FAM6_SKYLAKE=$((0x5E)) # /* Sky Lake */
readonly INTEL_FAM6_SKYLAKE_X=$((0x55)) # /* Sky Lake */
readonly INTEL_FAM6_KABYLAKE_L=$((0x8E)) # /* Sky Lake */
readonly INTEL_FAM6_KABYLAKE=$((0x9E)) # /* Sky Lake */
readonly INTEL_FAM6_COMETLAKE=$((0xA5)) # /* Sky Lake */
readonly INTEL_FAM6_COMETLAKE_L=$((0xA6)) # /* Sky Lake */
readonly INTEL_FAM6_CANNONLAKE_L=$((0x66)) # /* Palm Cove */
readonly INTEL_FAM6_ICELAKE_X=$((0x6A)) # /* Sunny Cove */
readonly INTEL_FAM6_ICELAKE_D=$((0x6C)) # /* Sunny Cove */
readonly INTEL_FAM6_ICELAKE=$((0x7D)) # /* Sunny Cove */
readonly INTEL_FAM6_ICELAKE_L=$((0x7E)) # /* Sunny Cove */
readonly INTEL_FAM6_ICELAKE_NNPI=$((0x9D)) # /* Sunny Cove */
readonly INTEL_FAM6_LAKEFIELD=$((0x8A)) # /* Sunny Cove / Tremont */
readonly INTEL_FAM6_ROCKETLAKE=$((0xA7)) # /* Cypress Cove */
readonly INTEL_FAM6_TIGERLAKE_L=$((0x8C)) # /* Willow Cove */
readonly INTEL_FAM6_TIGERLAKE=$((0x8D)) # /* Willow Cove */
readonly INTEL_FAM6_SAPPHIRERAPIDS_X=$((0x8F)) # /* Golden Cove */
readonly INTEL_FAM6_ALDERLAKE=$((0x97)) # /* Golden Cove / Gracemont */
readonly INTEL_FAM6_ALDERLAKE_L=$((0x9A)) # /* Golden Cove / Gracemont */
readonly INTEL_FAM6_RAPTORLAKE=$((0xB7)) #
readonly INTEL_FAM6_ATOM_BONNELL=$((0x1C)) # /* Diamondville, Pineview */
readonly INTEL_FAM6_ATOM_BONNELL_MID=$((0x26)) # /* Silverthorne, Lincroft */
readonly INTEL_FAM6_ATOM_SALTWELL=$((0x36)) # /* Cedarview */
readonly INTEL_FAM6_ATOM_SALTWELL_MID=$((0x27)) # /* Penwell */
readonly INTEL_FAM6_ATOM_SALTWELL_TABLET=$((0x35)) # /* Cloverview */
readonly INTEL_FAM6_ATOM_SILVERMONT=$((0x37)) # /* Bay Trail, Valleyview */
readonly INTEL_FAM6_ATOM_SILVERMONT_D=$((0x4D)) # /* Avaton, Rangely */
readonly INTEL_FAM6_ATOM_SILVERMONT_MID=$((0x4A)) # /* Merriefield */
readonly INTEL_FAM6_ATOM_AIRMONT=$((0x4C)) # /* Cherry Trail, Braswell */
readonly INTEL_FAM6_ATOM_AIRMONT_MID=$((0x5A)) # /* Moorefield */
readonly INTEL_FAM6_ATOM_AIRMONT_NP=$((0x75)) # /* Lightning Mountain */
readonly INTEL_FAM6_ATOM_GOLDMONT=$((0x5C)) # /* Apollo Lake */
readonly INTEL_FAM6_ATOM_GOLDMONT_D=$((0x5F)) # /* Denverton */
readonly INTEL_FAM6_ATOM_GOLDMONT_PLUS=$((0x7A)) # /* Gemini Lake */
readonly INTEL_FAM6_ATOM_TREMONT_D=$((0x86)) # /* Jacobsville */
readonly INTEL_FAM6_ATOM_TREMONT=$((0x96)) # /* Elkhart Lake */
readonly INTEL_FAM6_ATOM_TREMONT_L=$((0x9C)) # /* Jasper Lake */
readonly INTEL_FAM6_XEON_PHI_KNL=$((0x57)) # /* Knights Landing */
readonly INTEL_FAM6_XEON_PHI_KNM=$((0x85)) # /* Knights Mill */
}
g_parse_cpu_details_done=1 g_parse_cpu_details_done=1
} }
# Check whether the CPU vendor is Hygon # Check whether the CPU vendor is Hygon