mirror of
https://github.com/speed47/spectre-meltdown-checker.git
synced 2026-04-01 12:47:07 +02:00
use MSR names for read_msr for readability
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@@ -150,6 +150,11 @@ write_msr_one_core() {
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return $ret
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return $ret
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}
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}
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readonly MSR_IA32_PLATFORM_ID=0x17
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readonly MSR_IA32_SPEC_CTRL=0x48
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readonly MSR_IA32_ARCH_CAPABILITIES=0x10a
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readonly MSR_IA32_TSX_CTRL=0x122
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readonly MSR_IA32_MCU_OPT_CTRL=0x123
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readonly READ_MSR_RET_OK=0
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readonly READ_MSR_RET_OK=0
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readonly READ_MSR_RET_KO=1
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readonly READ_MSR_RET_KO=1
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readonly READ_MSR_RET_ERR=2
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readonly READ_MSR_RET_ERR=2
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@@ -66,7 +66,7 @@ parse_cpu_details() {
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# Set it to 8 (impossible value as it is 3 bit long) by default
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# Set it to 8 (impossible value as it is 3 bit long) by default
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cpu_platformid=8
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cpu_platformid=8
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if [ "$cpu_vendor" = GenuineIntel ] && [ "$cpu_model" -ge 5 ]; then
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if [ "$cpu_vendor" = GenuineIntel ] && [ "$cpu_model" -ge 5 ]; then
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read_msr 0x17
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read_msr $MSR_IA32_PLATFORM_ID
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ret=$?
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ret=$?
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if [ $ret = $READ_MSR_RET_OK ]; then
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if [ $ret = $READ_MSR_RET_OK ]; then
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# platform ID (bits 52:50) = bits 18:20 of the upper 32-bit word
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# platform ID (bits 52:50) = bits 18:20 of the upper 32-bit word
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@@ -355,8 +355,7 @@ check_cpu() {
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pr_info "* Hardware support (CPU microcode) for mitigation techniques"
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pr_info "* Hardware support (CPU microcode) for mitigation techniques"
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pr_info " * Indirect Branch Restricted Speculation (IBRS)"
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pr_info " * Indirect Branch Restricted Speculation (IBRS)"
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pr_info_nol " * SPEC_CTRL MSR is available: "
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pr_info_nol " * SPEC_CTRL MSR is available: "
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# the new MSR 'SPEC_CTRL' is at offset 0x48
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read_msr $MSR_IA32_SPEC_CTRL
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read_msr 0x48
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ret=$?
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ret=$?
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if [ $ret = $READ_MSR_RET_OK ]; then
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if [ $ret = $READ_MSR_RET_OK ]; then
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spec_ctrl_msr=1
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spec_ctrl_msr=1
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@@ -751,8 +750,7 @@ check_cpu() {
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cap_gds_no=0
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cap_gds_no=0
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pstatus yellow NO
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pstatus yellow NO
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else
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else
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# the new MSR 'ARCH_CAPABILITIES' is at offset 0x10a
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read_msr $MSR_IA32_ARCH_CAPABILITIES
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read_msr 0x10a
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ret=$?
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ret=$?
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cap_rdcl_no=0
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cap_rdcl_no=0
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cap_taa_no=0
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cap_taa_no=0
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@@ -866,7 +864,7 @@ check_cpu() {
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fi
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fi
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if [ "$cap_tsx_ctrl_msr" = 1 ]; then
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if [ "$cap_tsx_ctrl_msr" = 1 ]; then
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read_msr 0x122
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read_msr $MSR_IA32_TSX_CTRL
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ret=$?
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ret=$?
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if [ "$ret" = $READ_MSR_RET_OK ]; then
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if [ "$ret" = $READ_MSR_RET_OK ]; then
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cap_tsx_ctrl_rtm_disable=$(( ret_read_msr_value_lo >> 0 & 1 ))
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cap_tsx_ctrl_rtm_disable=$(( ret_read_msr_value_lo >> 0 & 1 ))
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@@ -904,8 +902,7 @@ check_cpu() {
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cap_gds_mitg_dis=-1
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cap_gds_mitg_dis=-1
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cap_gds_mitg_lock=-1
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cap_gds_mitg_lock=-1
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if [ "$cap_gds_ctrl" = 1 ]; then
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if [ "$cap_gds_ctrl" = 1 ]; then
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# read the IA32_MCU_OPT_CTRL MSR
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read_msr $MSR_IA32_MCU_OPT_CTRL
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read_msr 0x123
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ret=$?
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ret=$?
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if [ "$ret" = $READ_MSR_RET_OK ]; then
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if [ "$ret" = $READ_MSR_RET_OK ]; then
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cap_gds_mitg_dis=$(( ret_read_msr_value_lo >> 4 & 1 ))
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cap_gds_mitg_dis=$(( ret_read_msr_value_lo >> 4 & 1 ))
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@@ -1013,7 +1010,7 @@ check_cpu() {
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if [ $ret = $READ_CPUID_RET_OK ]; then
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if [ $ret = $READ_CPUID_RET_OK ]; then
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pstatus blue YES
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pstatus blue YES
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cap_srbds=1
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cap_srbds=1
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read_msr 0x123
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read_msr $MSR_IA32_MCU_OPT_CTRL
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ret=$?
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ret=$?
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if [ $ret = $READ_MSR_RET_OK ]; then
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if [ $ret = $READ_MSR_RET_OK ]; then
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if [ "$ret_read_msr_value" = "0000000000000000" ]; then
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if [ "$ret_read_msr_value" = "0000000000000000" ]; then
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