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https://github.com/speed47/spectre-meltdown-checker.git
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enh: CVE-2024-36357 CVE-2024-36350 (TSA): inventory of sysfs strings + consider vuln if TSA mitigation forced to user/kernel on hypervisors
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@@ -9,7 +9,7 @@ check_CVE_2024_36357() {
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# CVE-2024-36357 TSA-L1 (transient scheduler attack - L1 cache) - Linux mitigation check
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check_CVE_2024_36357_linux() {
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local status sys_interface_available msg kernel_tsa kernel_tsa_err ret
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local status sys_interface_available msg kernel_tsa kernel_tsa_err
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status=UNK
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sys_interface_available=0
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msg=''
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@@ -17,10 +17,57 @@ check_CVE_2024_36357_linux() {
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if sys_interface_check "$VULN_SYSFS_BASE/tsa"; then
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# this kernel has the /sys interface, trust it over everything
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sys_interface_available=1
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#
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# Complete sysfs message inventory for tsa
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#
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# all versions:
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# "Not affected" (cpu_show_common, pre-existing)
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#
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# --- mainline ---
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# d8010d4ba43e (v6.16-rc6, initial TSA sysfs):
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# "Vulnerable" (TSA_MITIGATION_NONE)
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# "Vulnerable: No microcode" (TSA_MITIGATION_UCODE_NEEDED)
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# "Mitigation: Clear CPU buffers: user/kernel boundary" (TSA_MITIGATION_USER_KERNEL)
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# "Mitigation: Clear CPU buffers: VM" (TSA_MITIGATION_VM)
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# "Mitigation: Clear CPU buffers" (TSA_MITIGATION_FULL)
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# 6b21d2f0dc73 (v6.17-rc1, attack vector controls):
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# no string changes; only mitigation selection logic changed
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# (AUTO can now resolve to USER_KERNEL or VM based on attack vector config)
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#
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# --- stable backports ---
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# 6.16.y: d8010d4ba43e (same as mainline), same strings.
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# 6.17.y: has 6b21d2f0dc73 (attack vector controls), same strings.
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# 5.10.y (78192f511f40), 5.15.y (f2b75f1368af), 6.1.y (d12145e8454f),
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# 6.6.y (90293047df18), 6.12.y (7a0395f6607a), 6.15.y (ab0f6573b211):
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# different UCODE_NEEDED string:
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# "Vulnerable: Clear CPU buffers attempted, no microcode" (TSA_MITIGATION_UCODE_NEEDED)
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# all other strings identical to mainline.
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# default is FULL (no AUTO enum); USER_KERNEL/VM only via cmdline tsa=user/tsa=vm.
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# VM-forced mitigation: when UCODE_NEEDED and running in a VM, forces FULL
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# (stable-only logic, not in mainline).
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#
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# --- RHEL/CentOS ---
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# rocky9 (5.14-based), rocky10 (6.12-based): same strings as mainline.
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# "Vulnerable: No microcode" for UCODE_NEEDED (matches mainline, NOT the stable variant).
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# rocky8 (4.18-based), centos7 (3.10-based): no TSA support.
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#
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# all messages start with either "Not affected", "Mitigation", or "Vulnerable"
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status=$ret_sys_interface_check_status
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fi
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if [ "$opt_sysfs_only" != 1 ]; then
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check_has_vmm
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# Override: when running as a hypervisor, "user/kernel boundary" mode
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# (tsa=user) leaves the VM exit boundary uncovered — guests can exploit
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# TSA to leak host data. The kernel correctly reports its own mode, but
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# the script must flag this as insufficient for a VMM host.
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if [ "$sys_interface_available" = 1 ] && [ "$g_has_vmm" != 0 ]; then
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if echo "$ret_sys_interface_check_fullmsg" | grep -q 'user/kernel boundary'; then
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status=VULN
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msg="Vulnerable: TSA mitigation limited to user/kernel boundary (tsa=user), VM exit boundary is not covered"
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fi
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fi
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pr_info_nol "* Kernel supports TSA mitigation: "
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kernel_tsa=''
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kernel_tsa_err=''
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@@ -78,6 +125,13 @@ check_CVE_2024_36357_linux() {
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elif [ -z "$msg" ]; then
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# if msg is empty, sysfs check didn't fill it, rely on our own test
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if [ "$opt_sysfs_only" != 1 ]; then
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# No --paranoid SMT check here, unlike TSA-SQ (CVE-2024-36350).
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# The kernel's cpu_bugs_smt_update() enables cpu_buf_idle_clear
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# (VERW before idle) specifically for TSA-SQ cross-thread leakage,
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# with the comment "TSA-SQ can potentially lead to info leakage
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# between SMT threads" — TSA-L1 is not mentioned. Until the kernel
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# flags TSA-L1 as having cross-thread SMT exposure, we follow its
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# assessment and do not require SMT disabled in paranoid mode.
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if [ "$cap_verw_clear" = 1 ] && [ -n "$kernel_tsa" ]; then
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pvulnstatus "$cve" OK "Both kernel and microcode mitigate the vulnerability"
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elif [ "$cap_verw_clear" = 1 ]; then
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@@ -98,5 +152,19 @@ check_CVE_2024_36357_linux() {
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fi
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else
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pvulnstatus "$cve" "$status" "$msg"
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if echo "$msg" | grep -q 'VM exit boundary'; then
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explain "This system runs a hypervisor but TSA mitigation only clears CPU buffers at\n " \
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"user/kernel transitions (tsa=user). Guests can exploit TSA to leak host data\n " \
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"across VM exit. Use \`tsa=on\` (or remove \`tsa=user\`) to cover both boundaries."
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fi
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fi
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}
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# CVE-2024-36357 TSA-L1 (transient scheduler attack - L1 cache) - BSD mitigation check
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check_CVE_2024_36357_bsd() {
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if ! is_cpu_affected "$cve"; then
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pvulnstatus "$cve" OK "your CPU vendor reported your CPU model as not affected"
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else
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pvulnstatus "$cve" UNK "your CPU is affected, but mitigation detection has not yet been implemented for BSD in this script"
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fi
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}
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