From 823f42dade6a0ce1094fef114f7a25031a4d895e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?St=C3=A9phane=20Lesimple?= <speed47_github@speed47.net>
Date: Mon, 30 Mar 2026 21:01:13 +0200
Subject: [PATCH] use MSR names for read_msr for readability

---
 src/libs/340_cpu_msr.sh     |  5 +++++
 src/libs/350_cpu_detect2.sh |  2 +-
 src/libs/400_hw_check.sh    | 13 +++++--------
 3 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/src/libs/340_cpu_msr.sh b/src/libs/340_cpu_msr.sh
index 9cb4a65..4a23c85 100644
--- a/src/libs/340_cpu_msr.sh
+++ b/src/libs/340_cpu_msr.sh
@@ -150,6 +150,11 @@ write_msr_one_core() {
     return $ret
 }
 
+readonly MSR_IA32_PLATFORM_ID=0x17
+readonly MSR_IA32_SPEC_CTRL=0x48
+readonly MSR_IA32_ARCH_CAPABILITIES=0x10a
+readonly MSR_IA32_TSX_CTRL=0x122
+readonly MSR_IA32_MCU_OPT_CTRL=0x123
 readonly READ_MSR_RET_OK=0
 readonly READ_MSR_RET_KO=1
 readonly READ_MSR_RET_ERR=2
diff --git a/src/libs/350_cpu_detect2.sh b/src/libs/350_cpu_detect2.sh
index 1445efa..1ca7da4 100644
--- a/src/libs/350_cpu_detect2.sh
+++ b/src/libs/350_cpu_detect2.sh
@@ -66,7 +66,7 @@ parse_cpu_details() {
     # Set it to 8 (impossible value as it is 3 bit long) by default
     cpu_platformid=8
     if [ "$cpu_vendor" = GenuineIntel ] && [ "$cpu_model" -ge 5 ]; then
-        read_msr 0x17
+        read_msr $MSR_IA32_PLATFORM_ID
         ret=$?
         if [ $ret = $READ_MSR_RET_OK ]; then
             # platform ID (bits 52:50) = bits 18:20 of the upper 32-bit word
diff --git a/src/libs/400_hw_check.sh b/src/libs/400_hw_check.sh
index 46d4f26..5d76305 100644
--- a/src/libs/400_hw_check.sh
+++ b/src/libs/400_hw_check.sh
@@ -355,8 +355,7 @@ check_cpu() {
     pr_info "* Hardware support (CPU microcode) for mitigation techniques"
     pr_info "  * Indirect Branch Restricted Speculation (IBRS)"
     pr_info_nol "    * SPEC_CTRL MSR is available: "
-    # the new MSR 'SPEC_CTRL' is at offset 0x48
-    read_msr 0x48
+    read_msr $MSR_IA32_SPEC_CTRL
     ret=$?
     if [ $ret = $READ_MSR_RET_OK ]; then
         spec_ctrl_msr=1
@@ -751,8 +750,7 @@ check_cpu() {
             cap_gds_no=0
             pstatus yellow NO
         else
-            # the new MSR 'ARCH_CAPABILITIES' is at offset 0x10a
-            read_msr 0x10a
+            read_msr $MSR_IA32_ARCH_CAPABILITIES
             ret=$?
             cap_rdcl_no=0
             cap_taa_no=0
@@ -866,7 +864,7 @@ check_cpu() {
         fi
 
         if [ "$cap_tsx_ctrl_msr" = 1 ]; then
-            read_msr 0x122
+            read_msr $MSR_IA32_TSX_CTRL
             ret=$?
             if [ "$ret" = $READ_MSR_RET_OK ]; then
                 cap_tsx_ctrl_rtm_disable=$(( ret_read_msr_value_lo >> 0 & 1 ))
@@ -904,8 +902,7 @@ check_cpu() {
         cap_gds_mitg_dis=-1
         cap_gds_mitg_lock=-1
         if [ "$cap_gds_ctrl" = 1 ]; then
-            # read the IA32_MCU_OPT_CTRL MSR
-            read_msr 0x123
+            read_msr $MSR_IA32_MCU_OPT_CTRL
             ret=$?
             if [ "$ret" = $READ_MSR_RET_OK ]; then
                 cap_gds_mitg_dis=$(( ret_read_msr_value_lo >> 4 & 1 ))
@@ -1013,7 +1010,7 @@ check_cpu() {
     if [ $ret = $READ_CPUID_RET_OK ]; then
         pstatus blue YES
         cap_srbds=1
-        read_msr 0x123
+        read_msr $MSR_IA32_MCU_OPT_CTRL
         ret=$?
         if [ $ret = $READ_MSR_RET_OK ]; then
             if [ "$ret_read_msr_value" = "0000000000000000" ]; then