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https://github.com/speed47/spectre-meltdown-checker.git
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enh: clearer CPU details section
This commit is contained in:
Stéphane Lesimple
127
src/libs/004_intel_codenames.sh
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127
src/libs/004_intel_codenames.sh
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@@ -0,0 +1,127 @@
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# vim: set ts=4 sw=4 sts=4 et:
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# Human-friendly codename lookup for Intel CPUs.
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# Depends on constants from 003_intel_models.sh being set.
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# Print the human-friendly codename for the current Intel CPU, or nothing if unknown.
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# Reads: cpu_family, cpu_model (set by parse_cpu_details)
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get_intel_codename() {
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case "$cpu_family" in
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5)
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case "$cpu_model" in
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"$INTEL_FAM5_PENTIUM_75") echo "Pentium 75 (P54C)" ;;
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"$INTEL_FAM5_PENTIUM_MMX") echo "Pentium MMX (P55C)" ;;
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"$INTEL_FAM5_QUARK_X1000") echo "Quark X1000" ;;
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esac
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;;
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6)
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case "$cpu_model" in
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"$INTEL_FAM6_PENTIUM_PRO") echo "Pentium Pro" ;;
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"$INTEL_FAM6_PENTIUM_II_KLAMATH") echo "Pentium II (Klamath)" ;;
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"$INTEL_FAM6_PENTIUM_III_DESCHUTES") echo "Pentium III (Deschutes)" ;;
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"$INTEL_FAM6_PENTIUM_III_TUALATIN") echo "Pentium III (Tualatin)" ;;
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"$INTEL_FAM6_PENTIUM_M_DOTHAN") echo "Pentium M (Dothan)" ;;
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"$INTEL_FAM6_CORE_YONAH") echo "Core (Yonah)" ;;
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"$INTEL_FAM6_CORE2_MEROM") echo "Core 2 (Merom)" ;;
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"$INTEL_FAM6_CORE2_MEROM_L") echo "Core 2 (Merom-L)" ;;
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"$INTEL_FAM6_CORE2_PENRYN") echo "Core 2 (Penryn)" ;;
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"$INTEL_FAM6_CORE2_DUNNINGTON") echo "Core 2 (Dunnington)" ;;
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"$INTEL_FAM6_NEHALEM") echo "Nehalem" ;;
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"$INTEL_FAM6_NEHALEM_G") echo "Nehalem (Auburndale / Havendale)" ;;
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"$INTEL_FAM6_NEHALEM_EP") echo "Nehalem EP" ;;
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"$INTEL_FAM6_NEHALEM_EX") echo "Nehalem EX" ;;
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"$INTEL_FAM6_WESTMERE") echo "Westmere" ;;
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"$INTEL_FAM6_WESTMERE_EP") echo "Westmere EP" ;;
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"$INTEL_FAM6_WESTMERE_EX") echo "Westmere EX" ;;
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"$INTEL_FAM6_SANDYBRIDGE") echo "Sandy Bridge" ;;
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"$INTEL_FAM6_SANDYBRIDGE_X") echo "Sandy Bridge-E" ;;
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"$INTEL_FAM6_IVYBRIDGE") echo "Ivy Bridge" ;;
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"$INTEL_FAM6_IVYBRIDGE_X") echo "Ivy Bridge-E" ;;
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"$INTEL_FAM6_HASWELL") echo "Haswell" ;;
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"$INTEL_FAM6_HASWELL_X") echo "Haswell-E" ;;
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"$INTEL_FAM6_HASWELL_L") echo "Haswell (low power)" ;;
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"$INTEL_FAM6_HASWELL_G") echo "Haswell (GT3e)" ;;
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"$INTEL_FAM6_BROADWELL") echo "Broadwell" ;;
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"$INTEL_FAM6_BROADWELL_G") echo "Broadwell (GT3e)" ;;
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"$INTEL_FAM6_BROADWELL_X") echo "Broadwell-E" ;;
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"$INTEL_FAM6_BROADWELL_D") echo "Broadwell-DE" ;;
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"$INTEL_FAM6_SKYLAKE_L") echo "Skylake (mobile)" ;;
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"$INTEL_FAM6_SKYLAKE") echo "Skylake (desktop)" ;;
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"$INTEL_FAM6_SKYLAKE_X") echo "Skylake-X / Cascade Lake / Cooper Lake" ;;
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"$INTEL_FAM6_KABYLAKE_L") echo "Kaby Lake (mobile) / Sky Lake" ;;
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"$INTEL_FAM6_KABYLAKE") echo "Kaby Lake / Coffee Lake / Sky Lake" ;;
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"$INTEL_FAM6_COMETLAKE") echo "Comet Lake / Sky Lake" ;;
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"$INTEL_FAM6_COMETLAKE_L") echo "Comet Lake (mobile) / Sky Lake" ;;
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"$INTEL_FAM6_CANNONLAKE_L") echo "Cannon Lake (Palm Cove)" ;;
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"$INTEL_FAM6_ICELAKE_X") echo "Ice Lake-X (Sunny Cove)" ;;
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"$INTEL_FAM6_ICELAKE_D") echo "Ice Lake-D (Sunny Cove)" ;;
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"$INTEL_FAM6_ICELAKE") echo "Ice Lake (Sunny Cove)" ;;
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"$INTEL_FAM6_ICELAKE_L") echo "Ice Lake-L (Sunny Cove)" ;;
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"$INTEL_FAM6_ICELAKE_NNPI") echo "Ice Lake NNPI (Sunny Cove)" ;;
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"$INTEL_FAM6_ROCKETLAKE") echo "Rocket Lake (Cypress Cove)" ;;
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"$INTEL_FAM6_TIGERLAKE_L") echo "Tiger Lake-L (Willow Cove)" ;;
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"$INTEL_FAM6_TIGERLAKE") echo "Tiger Lake (Willow Cove)" ;;
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"$INTEL_FAM6_SAPPHIRERAPIDS_X") echo "Sapphire Rapids-X (Golden Cove)" ;;
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"$INTEL_FAM6_EMERALDRAPIDS_X") echo "Emerald Rapids-X (Raptor Cove)" ;;
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"$INTEL_FAM6_GRANITERAPIDS_X") echo "Granite Rapids-X (Redwood Cove)" ;;
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"$INTEL_FAM6_GRANITERAPIDS_D") echo "Granite Rapids-D (Redwood Cove)" ;;
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"$INTEL_FAM6_BARTLETTLAKE") echo "Bartlett Lake (Raptor Cove)" ;;
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"$INTEL_FAM6_LAKEFIELD") echo "Lakefield (Sunny Cove + Tremont)" ;;
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"$INTEL_FAM6_ALDERLAKE") echo "Alder Lake (Golden Cove + Gracemont)" ;;
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"$INTEL_FAM6_ALDERLAKE_L") echo "Alder Lake-L (Golden Cove + Gracemont)" ;;
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"$INTEL_FAM6_RAPTORLAKE") echo "Raptor Lake (Raptor Cove + Enhanced Gracemont)" ;;
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"$INTEL_FAM6_RAPTORLAKE_P") echo "Raptor Lake-P (Raptor Cove + Enhanced Gracemont)" ;;
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"$INTEL_FAM6_RAPTORLAKE_S") echo "Raptor Lake-S (Raptor Cove + Enhanced Gracemont)" ;;
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"$INTEL_FAM6_METEORLAKE") echo "Meteor Lake (Redwood Cove + Crestmont)" ;;
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"$INTEL_FAM6_METEORLAKE_L") echo "Meteor Lake-L (Redwood Cove + Crestmont)" ;;
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"$INTEL_FAM6_ARROWLAKE_H") echo "Arrow Lake-H (Lion Cove + Skymont)" ;;
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"$INTEL_FAM6_ARROWLAKE") echo "Arrow Lake (Lion Cove + Skymont)" ;;
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"$INTEL_FAM6_ARROWLAKE_U") echo "Arrow Lake-U (Lion Cove + Skymont)" ;;
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"$INTEL_FAM6_LUNARLAKE_M") echo "Lunar Lake-M (Lion Cove + Skymont)" ;;
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"$INTEL_FAM6_PANTHERLAKE_L") echo "Panther Lake-L (Cougar Cove + Darkmont)" ;;
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"$INTEL_FAM6_WILDCATLAKE_L") echo "Wildcat Lake-L" ;;
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"$INTEL_FAM6_ATOM_BONNELL") echo "Atom Bonnell (Diamondville / Pineview)" ;;
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"$INTEL_FAM6_ATOM_BONNELL_MID") echo "Atom Bonnell (Silverthorne / Lincroft)" ;;
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"$INTEL_FAM6_ATOM_SALTWELL") echo "Atom Saltwell (Cedarview)" ;;
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"$INTEL_FAM6_ATOM_SALTWELL_MID") echo "Atom Saltwell (Penwell)" ;;
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"$INTEL_FAM6_ATOM_SALTWELL_TABLET") echo "Atom Saltwell (Cloverview)" ;;
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"$INTEL_FAM6_ATOM_SILVERMONT") echo "Atom Silvermont (Bay Trail)" ;;
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"$INTEL_FAM6_ATOM_SILVERMONT_D") echo "Atom Silvermont-D (Avaton / Rangely)" ;;
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"$INTEL_FAM6_ATOM_SILVERMONT_MID") echo "Atom Silvermont (Merriefield)" ;;
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"$INTEL_FAM6_ATOM_SILVERMONT_MID2") echo "Atom Silvermont (Anniedale)" ;;
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"$INTEL_FAM6_ATOM_AIRMONT") echo "Atom Airmont (Cherry Trail / Braswell)" ;;
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"$INTEL_FAM6_ATOM_AIRMONT_NP") echo "Atom Airmont (Lightning Mountain)" ;;
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"$INTEL_FAM6_ATOM_GOLDMONT") echo "Atom Goldmont (Apollo Lake)" ;;
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"$INTEL_FAM6_ATOM_GOLDMONT_D") echo "Atom Goldmont-D (Denverton)" ;;
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"$INTEL_FAM6_ATOM_GOLDMONT_PLUS") echo "Atom Goldmont Plus (Gemini Lake)" ;;
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"$INTEL_FAM6_ATOM_TREMONT_D") echo "Atom Tremont-D (Jacobsville)" ;;
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"$INTEL_FAM6_ATOM_TREMONT") echo "Atom Tremont (Elkhart Lake)" ;;
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"$INTEL_FAM6_ATOM_TREMONT_L") echo "Atom Tremont-L (Jasper Lake)" ;;
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"$INTEL_FAM6_ATOM_GRACEMONT") echo "Atom Gracemont (Alder Lake-N)" ;;
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"$INTEL_FAM6_ATOM_CRESTMONT_X") echo "Atom Crestmont-X (Sierra Forest)" ;;
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"$INTEL_FAM6_ATOM_CRESTMONT") echo "Atom Crestmont (Grand Ridge)" ;;
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"$INTEL_FAM6_ATOM_DARKMONT_X") echo "Atom Darkmont-X (Clearwater Forest)" ;;
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"$INTEL_FAM6_XEON_PHI_KNL") echo "Xeon Phi (Knights Landing)" ;;
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"$INTEL_FAM6_XEON_PHI_KNM") echo "Xeon Phi (Knights Mill)" ;;
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esac
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;;
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15)
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case "$cpu_model" in
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"$INTEL_FAM15_P4_WILLAMETTE") echo "Pentium 4 (Willamette)" ;;
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"$INTEL_FAM15_P4_PRESCOTT") echo "Pentium 4 (Prescott)" ;;
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"$INTEL_FAM15_P4_PRESCOTT_2M") echo "Pentium 4 (Prescott 2M)" ;;
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"$INTEL_FAM15_P4_CEDARMILL") echo "Pentium 4 (Cedarmill)" ;;
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esac
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;;
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18)
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case "$cpu_model" in
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"$INTEL_FAM18_NOVALAKE") echo "Nova Lake (Coyote Cove)" ;;
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"$INTEL_FAM18_NOVALAKE_L") echo "Nova Lake-L (Coyote Cove)" ;;
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esac
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;;
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19)
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case "$cpu_model" in
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"$INTEL_FAM19_DIAMONDRAPIDS_X") echo "Diamond Rapids-X (Panther Cove)" ;;
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esac
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;;
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esac
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}
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@@ -345,13 +345,37 @@ sys_interface_check() {
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# Display hardware-level CPU mitigation support (microcode features, ARCH_CAPABILITIES, etc.)
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# Display hardware-level CPU mitigation support (microcode features, ARCH_CAPABILITIES, etc.)
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check_cpu() {
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check_cpu() {
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local capabilities ret spec_ctrl_msr
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local capabilities ret spec_ctrl_msr codename ucode_str
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pr_info "\033[1;34mHardware check\033[0m"
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pr_info "\033[1;34mHardware check\033[0m"
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if ! uname -m | grep -qwE 'x86_64|i[3-6]86|amd64'; then
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if ! uname -m | grep -qwE 'x86_64|i[3-6]86|amd64'; then
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return
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return
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fi
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fi
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pr_info "* CPU details"
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pr_info " * Vendor: $cpu_vendor"
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pr_info " * Model name: $cpu_friendly_name"
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pr_info " * Family: $(printf '0x%02x' "$cpu_family") Model: $(printf '0x%02x' "$cpu_model") Stepping: $(printf '0x%02x' "$cpu_stepping")"
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if [ -n "$cpu_ucode" ]; then
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ucode_str=$(printf '0x%x' "$cpu_ucode")
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else
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ucode_str="N/A"
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fi
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pr_info " * Microcode: $ucode_str"
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pr_info " * CPUID: $(printf '0x%08x' "$cpu_cpuid")"
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if is_intel; then
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pr_info " * Platform ID: $(printf '0x%02x' "$cpu_platformid")"
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if [ "$cpu_hybrid" = 1 ]; then
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pr_info " * Hybrid CPU: YES"
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else
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pr_info " * Hybrid CPU: NO"
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fi
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codename=$(get_intel_codename)
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if [ -n "$codename" ]; then
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pr_info " * Codename: $codename"
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fi
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fi
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pr_info "* Hardware support (CPU microcode) for mitigation techniques"
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pr_info "* Hardware support (CPU microcode) for mitigation techniques"
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pr_info " * Indirect Branch Restricted Speculation (IBRS)"
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pr_info " * Indirect Branch Restricted Speculation (IBRS)"
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pr_info_nol " * SPEC_CTRL MSR is available: "
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pr_info_nol " * SPEC_CTRL MSR is available: "
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