From 3bfab0f8dd9e2f28e729b1ecd6f969077fb4d0ed Mon Sep 17 00:00:00 2001 From: dajiang Date: Wed, 26 Dec 2018 10:21:57 +0800 Subject: [PATCH] update microarhitecture name for Hygon CPU family 24 with moksha --- spectre-meltdown-checker.sh | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/spectre-meltdown-checker.sh b/spectre-meltdown-checker.sh index 5a350e4..cbcfb88 100755 --- a/spectre-meltdown-checker.sh +++ b/spectre-meltdown-checker.sh @@ -1421,9 +1421,8 @@ is_zen_cpu() [ "$cpu_family" = 23 ] && return 0 return 1 } -is_dhyana_arch_cpu() +is_moksha_cpu() { - # [note] the microarchitecture name maybe update later parse_cpu_details is_hygon || return 1 [ "$cpu_family" = 24 ] && return 0 @@ -3019,7 +3018,7 @@ check_CVE_2017_5715_linux() if is_vulnerable_to_empty_rsb; then pvulnstatus $cve VULN "IBRS+IBPB or retpoline+IBPB+RSB filling, is needed to mitigate the vulnerability" explain "To mitigate this vulnerability, you need either IBRS + IBPB, both requiring hardware support from your CPU microcode in addition to kernel support, or a kernel compiled with retpoline and IBPB, with retpoline requiring a retpoline-aware compiler (re-run this script with -v to know if your version of gcc is retpoline-aware) and IBPB requiring hardware support from your CPU microcode. You also need a recent-enough kernel that supports RSB filling if you plan to use retpoline. For Skylake+ CPUs, the IBRS + IBPB approach is generally preferred as it guarantees complete protection, and the performance impact is not as high as with older CPUs in comparison with retpoline. More information about how to enable the missing bits for those two possible mitigations on your system follow. You only need to take one of the two approaches." - elif is_zen_cpu || is_dhyana_arch_cpu; then + elif is_zen_cpu || is_moksha_cpu; then pvulnstatus $cve VULN "retpoline+IBPB is needed to mitigate the vulnerability" explain "To mitigate this vulnerability, You need a kernel compiled with retpoline + IBPB support, with retpoline requiring a retpoline-aware compiler (re-run this script with -v to know if your version of gcc is retpoline-aware) and IBPB requiring hardware support from your CPU microcode." elif is_intel || is_amd || is_hygon; then